Field of the Invention
The present invention relates to semiconductor devices, and in particular to radio frequency (RF) testing systems for semiconductor devices.
Description of the Related Art
Semiconductor devices are manufactured in the form of wafers comprising many thousands of devices. The wafers are diced into dies and packaged into integrated circuits (IC). Each IC has been implemented by integrating more and more digital and analog circuits into a single chip.
Due to the increasing complexity of the testing of integrated RF circuits, to identify the “good” and “bad” ICs during production is a challenging problem for those conducting the wafer-level test or final test. In the traditional testing of RF circuits, what is used is expensive automatic test equipment (ATE), such as UltraFlex or Flex with RF instruments, or equipment used in mixing signals is used for generating an RF test signal (or RF patterns) to a device under test (DUT) and processing RF signals emanating from the DUT, leading to increased cost and time to conduct the tests.
In addition, a system-on-chip (SoC) usually includes RF or analog circuits, digital baseband circuits, and digital processing units, and the RF or analog circuits are located in the analog die of the SoC while the digital baseband circuits and digital processing units are located in the digital die of the SoC. However, a stand-alone RF or analog IC does not have digital components. Specifically, the SoC is capable of performing on-chip RF testing by its internal embedded digital signal processor (DSP), but the stand-alone RF or analog IC is not able to do on-chip RF testing due to lack of a DSP. Furthermore, it usually requires automatic test equipment with expensive RF instruments to test the RF or analog circuits with high complexity.
Therefore, there is a need for an effective RF test technique for transceivers that can solve the above-mentioned problems.